TLB is actually a map table maintained by the system to map Virtual Page address and its Page Frame number (or Physical Page address). It is used to Cache the translation address of frequently referenced virtual address. Each time a process context switch happen, the entries in this table where were private to this process gets invalidated. Rest (specifically those with Global bit on), such as System space pages, remain there.
If virtual page is paged out or its PTE is changes, then Memory manager explicitly invalidates its entry (if present) in TLB.
If virtual page is paged out or its PTE is changes, then Memory manager explicitly invalidates its entry (if present) in TLB.
No comments:
Post a Comment